Overcurrent protective means



vv. c. KoTHElMER 3,317,794 -Y OVERCURRENT PROTECTIVE MEANS 2Sheets-Sheet l Filed April 13, 1964 /NvE/vmfv: l/V/L/AM C. /forHE/MER,5V mk*- 5. Arrow/w91 United States Patent() s 317,794 OVERCURRENTPROTECTIVE MEANS William C. Kotheimer, Drexel Hill, Pa., assignor toGeneral Electric Company, a corporation of New York Filed Apr. 13, 1964,Ser. No. 359,274 Claims. (Cl. 317-36) This invention relates toprotective means for electric current circuits, and more particularly itrelates to an improved overcurrent responsive protective deviceutilizing an electric energy accumulating element, such as a capacitor,to delay operation of the device for a length of time that is inverselyrelated to the amount of overcurrent in the protected circuit.

In the art of protecting electric lines or circuits, it is commonpractice to use devices or relays designed to operate, in response toabnormal circuit conditions, with a time delay inversely related to theseverity of the abnormality, For example, the overcurrent protectiverelay having an inverse-time-overcurrent operating characteristic iswell known in the art, as is the time-over-current trip device forelectric circuit breakers. In order to provide optimum circuitprotection whenever an overcurrent or fault (short circuit) conditionoccurs, the operating characteristic of such a device should ideallyapproach an IZt-equals-a-constant relationship, that is, the operatingtime (t) of the protective device should vary inversely in proportion toapproximately the second power of the circuit current (I). Such anoperating characteristic will match the thermal damage characteristic ofthe protected circuit under abnormal conditions, when the threat ofdamage is proportional to the square of the current value.

While inverse-time-overcurrent devices employing mechanical orelectromechanical construction to obtain the requisite time delay havehad a long and successful history, such prior art devices do have somerecognize-d drawbacks. The principal ones, perhaps, are the relativelylarge amount of input energy required for reliable operation and theinherent inertia of the movable armature or rotol of the device.Consequently, there is a trend in the art today to accomplish the samefunctional result by means of static circuitry, i.e., by apropriatecombinations of semiconductors land other physically small, lowpowersolid-state components having no moving parts.

Typically such a static arrangement employs, in combination, electricenergy storing means comprising a reactance element, such as acapacitor, and level detecting means responsive to the reactance elementaccumulating a predetermined critical level of energy. By suitablyenergizing the energy storing means in response to an overcurrentcondition in the circuit whose protection is desired, the reactanceelement attains the aforesaid critical level of energy (and hence thelevel detecting means will operate )on the expiration of a time delayinversely related to the degree of overcurrent involved.

There are several different ways in which the electric energy storingmeans can be energized to obtain or approximate this result. One commonapproach, for example, has been to provide a continuous D.-C. energizingsignal whose magnitude is a function of the amount of overcurrent in theprotected circuit. Another approach has been to effect intermittentenergization of the energy storing means by a constant-magnitude signal,with the number of energizing increments per unit of time being variedas a function of overcurrent magnitude. In order to obtain an l2t=Koperating characteristic (K is a constant), it has been necessary whenusing the latter approach to make the repetition rate of theintermittent energizing signal a nonlinear function of overcurrentmagnitude.

A general object of the present invention is the provision of a newstatic time delay protective device, and a more specic object is theprovision of an overcurrent protective device of the kind employing anintermittently energized reactance element, the device being so designedthat an I2t=K operating characteristic can ybe closely approachedWithout requiring a non-linear relationship between the rate ofenergization and the magnitude of overcurrent.

Another objective of my invention is to provide improved overcurrentprotective means that includes an incrementally charged capacitorenergized in accordance with an electric quantity that varies with themagnitude of current in the circuit being protected.

ln carrying out my invention in one form, a protective device is formedby providing, in combination, electric energy storing means and meansfor supplying the energy storing means with a succession offixed-duration energizing pulses the amplitude and frequency of whichare both modulated by a signal that is derived from and representativeof current in the electric current circuit being protected. The deviceadditionally includes means connected to the energy storing means forinitiating a predetermined protective function when the amount of energyaccumulated in that energy storing means attains a predeterminedcritical level indicating that an overcurrent condition has occurred inthe protected circuit. With this arrangement the time required by theenergy storing means to accumulate its critical amount of energy willvary as an inverse function of approximately the square of theovercurrent value.

My invention will be better understood and its various objects andadvantages will be more fully appreciated from the following descriptiontaken in conjunction with the accompaying drawings in which:

FIG. 1 is a schematic diagram, partly in block form, of an overcurrentprotective device embodying my invention; and

FIG. 2 is a detail schematic diagram of the preferred I circuitry of thecomponents shown in block .form in FIG. 1.

ln FIG. 1 the electric current circuit that is subject to protection isrepresented by the single line 11 labeled A.C. line. This line transmitselectric power from a source terminal 12, to which it is connected bymeans of a circuit interrupter or switch 13, to a load terminal 14.Automatic opening of the switch 13 is desired in delayed response to theoccurrence of overcurrent or fault conditions in the line 11 or inwhatever utilization apparatus or load circuit may be connected to 'theterminal 14. My protective means accomplishes this result by sensing theovercurrent condition and then initiating an opening operation of theswitch 13 after a time delay that is inversely related to the amount ofovercurrent in the line 11.

The preferred form of the protective device has been shown functionallyin FIG. 1. It comprises a combination of components including currentsensing and translating means 1S coupled to the line 11 and suitablyarranged to derive a D.-C. signal representative of line current. Themagnitude of the derived signal varies with the value of current in theprotected line. This signal serves as an input quantity for othercomponents of my device which are responsive to its magnitude.

The representative input signal is applied to a time delay circuitcomprising an Adjustable Resistance element 16 in series with an energyaccumulating reactance element 17, labeled Energy Storage (Long Time) inFIG. 1. The latterelement may have either capacitive or inductivereactance. In the preferred embodiment of my invention, a diode D1 isserially included between elements 16 and 17, and the current that thisdiode conducts serves as an energizing signal for the reactance element17. The magnitude -of this signal will depend on the magnitude of theinput signal and the adjustment of the resistance element 16. Whetherthe diode D1 is conductive or not is dependent on the state ofsupervising means 19 which has been illustrated symbolically in FIG. 1as an AND logic block shunting the reactance element 17.

In accordance with my invention, the supervising means 19 normallyprevents the reactance element 17 from receiving any appreciable amountof energy from the input signal. But intermittently the state of thesupervising means is changed to one enabling the element 17 toaccumulate energy from the input signal. This is accomplished bytransmitting to the supervising means a pulsating control signalproduced by periodically operative control means a and 20b, with thesupervising means being arranged to change from its normal state to itsenabling state in response to each control signal pulse.

The illustrated control means comprises a frequencymodulated pulsegenerator 20a and a slave pulsing circuit with pulse width control 20b.The generator 20a is energized by the representative input signal and isarranged to operate with a frequency that depends upon the magnitude ofthat signal. More specifically, in the preferred embodiment of myinvention the operating frequency of the generator 20a varies linearlywith the magnitude of the input signal. However, e'ach of the successiveperiods throughout which the generator operates will have a fixed andrelatively brief duration.

The slave circuit 20b operates in synchronism with operation of thegenerator 20a to produce a train of control pulses of predeterminedduration. While the slave circuit 20b provides advantageous means forcontrolling the width of each pulse of the control signal (by whichmeans the whole protective device can conveniently be calibrated), it isnot essential to the successful practice of my invention. The inclusionof this particular component is in fact the invention of F. L. Steen andis claimed in his copending patent application S.N. 361,520, filed Apr.2l, 1964, and assigned to the assignee of the present application.

It will now be apparent that thel supervising means 19 permits theenergization of element 17 through the diode D1 to be effected onlyduring intermittent periods of relatively brief duration, termined bythe operating frequency of the generator 20a. Therefore the reactanceelement 17 is supplied with a succession of discrete energizing pulsesthe amplitude of which is modulated by the input signal and thefrequency of which is also modulated by the input signal. The energythat the element 17 incrementally receives and accumulates in thisfashion is blocked by the diode D1 from being dissipated through thesupervising means 19 during those recurrent intervals when no controlsignal is provided and the supervising means is in its normal state.

When the reactance element 17 has been so energized for a sufficientlength of time to increase the energy acmumulated therein to apredetermined critical level, a level detector 21 connected theretooperates to produce an output signal for opening the switch 13 in theprotected line 11, thereby disconnecting the line from its power source.The time required for the energy accumulated in element 17 to attainthis critical level, following the occurrence of an overcurrentcondition, will be inversely related to approximately the second powerof the overcurrent magnitude. As will be further explained hereinafter,this l2t=K operating characteristic is obtained because both themagnitude and the frequency of the pulsating energizing signal vary inaccordance with the magnitude of the input signal which in turn isdetermined by the amount of overcurrent. In the illustrated embodimentof my invention a number of other functional components are associatedwith the basic ones described above. iFor example, additionalsupervising means 22, illustrated symbolically as an AND logic blockshunting the reactance element 17, is provided for starting andresetting the time delay cirwhich periods occur at .a rate dev cuit.This supervising means is arranged to prevent the accumulation of morethan a relatively small amount of energy in the reactance element 17 solong as an associated level detector (low set) 23 is inoperative and topermit appreciable energy accumulation only while the level detector 23is operating. Consequently no energy can begin to accumulate in element17 until the level detector 23 operates (picks up), and any energystored in this element when the level detector 23 subsequently stopsoperating (drops out) will quickly be dissipated through the supervisingmeans 2-2, thereby resetting the time delay circuit. As taught by Steenin his previously mentioned Vcopending patent application, the low setlevel detector 23 is also used to control means for suppressingoperation of the frequency-modulated pulse generator 20a except when thelevel detector is operating, whereby this level detector must be inoperation in order for a pulsating control signal to be transmitted tothe supervising means 19.

Operation of the low set level detector 23 is controlled by therepresentative input signal: it is inoperative so' long as the magnitudeof the input signal reflects normal full load current in the protectedline 11; it is operative in response to the input signal magnitudeattaining a predetermined pickup level corresponding to a predeterminedovercurrent condition in the line; and it operates continuously so longas the signal magnitude exceeds the aforesaid pickup level. Toward thisend the level detector 23 is energized by the input signal and by aconstantmagnitude D.C. reference voltage with which the variablemagnitude input signal can be compared, and the level detector isarranged to operate whenever this comparison indicates that pickupmagnitude has been reached. The reference voltage is obtained from aRegulator component 24 connected to the D.-C. input signal derivingmeans 15, with isolating diodes D2 and D3 being provided as shown.Reliability of the protective device is improved under low-gradeovercurrent conditions by also connecting the regulator 24 to analternative source comprising a Potential Sensor and Rectifier 25 forderiving a D.-C. signal from the electric power source voltage at theswitch 13.

As can be seen in FIG. 1, the regulated D.-C. reference voltage issupplied to various components of the protective device in addition tothe level detector 23, including the previously mentioned leveldetecting means 21 and yet another level detector (high set) 28. Thehigh set level detector 28 is connected to 15 for energization by therepresentative input signal, and it is arranged to operate in responseto the magnitude of this signal attaining a desired pickup level that ishigher than the pickup level to which the low set lever detector 23responds. When operative, the high set level detector 28 effects theapplication of the D.-C. reference voltage to a second time delaycircuit comprising an Adjustable Resistance element 29 in series with anenergy accumulating reactance element 30, labeled Energy Storage (ShortTime) in FIG. 1.

The reactance element 30 is connected via an isolating diode D4 to thelevel detector 21 which responds to the accumulation of a predeterminedcritical level of energy in the element 30 by producing an output signalto open the switch 13 The reactance element 30 is selected to have asmaller energy storing capacity than the reactance `element 17 in thepreviously described time delay circuit 16, 17, and the associatedparameters (including the adjustment of the resistance element 29) .areso chosen that once level detector 28 operates the energy accumulated inthe element 30 attains a level required to activate the level detector21 faster than the energy accumulating in the element 17 can build up toits critical level. Thus the time delay circuit comprising elements 29and 30 performs a short time protective function in response to thosesevere, high-overcurrent fault conditions that cause the level detector28 to operate.

As is shown in FIG. l, not only the level detector 21 but also theresetting or supervising means 22 is common of an abnormal circuitcondition.

to both short and long time delay circuits. Independent timing by thetwo reactance elements 30 and 17 is nevertheless ensured by includingisolating diodes D4 and D5 in their respective connections to the leveldetector 21. The'supervising means 22 is connected to the commonelectrodes of these diodes and quickly dissipates any energy accumulatedin either of the elements 31) and 17 when the low set level detector 23stops operating (drops out). This particular component operation is partof the claimed subject matter of the above-mentioned copending patentapplication of F. L. Steen.

In the illustrated embodiment of my protective device, the leveldetector 21 has periodically active sampling means 31 associatedtherewith for effecting at frequently recurring intervals a momentaryincrease in its sensi tivity. This arrangement embraces the teaching ofC. A. Mathews, for which see his copending patent application S.N.128,472, iiled Aug. 1, 1961 (now Patent No. 3,179,- 850, granted April20, 1965), and assigned to the assignee of the present application. Thesampling means 31, as it is shown in FIG. 1, is controlled by thecontrol means 20a and 2Gb and is therefore activated each time thesupervising means 19 is changed from its normal state to its stateenabling the reactance element 17 to receive energy from therepresentative input signal.

Turning now to FIG. 2, a detail circuit diagram is presented of thepreferred embodiment of the protective device shown functionally in FIG.l. As has already been explained, this device is designed to initiate apredetermined control function (such as opening the switch 13 in orderto disconnect the protected circuit 11 from its power source 12) indelayed response to the occurrence A 3-wire polyphase A.C. circuit orline 11 is shown in FIG. 2, and the protective device is energized inaccordance with a characteristic circuit quantity Whose value, beyond agiven normal value, reflects both the occurrence and the severity of theabnormal condition to which the device responds. In the illustratedapplication of the protective device7 this characteristic quantity isalternating current, and therefore the device is adapted to be coupledto the wires of circuit 11 by means of suitable current sensors 40a,4Gb, and 40e which respectively develop secondary voltages proportionalto A.C. line cu-rrents in the associated wires. The current sensors 40a,40b, and 40C are respectively connected to full wave rectiers 41a, 41b,and 41c, and this combination comprises the current sensing andtranslating means 15 of FIG. l.

As can be seen in FIG. 2, the negative D.C. terminals of the full waverectiliers 41a, 41b, and 41C are all connected to a common bus N, whilethe positive D.C. terminals of these rectifers are all connected by wayof a wire 42 and the respective diodes D2 and D3 to the regulator 24 andto a representative signal bus V. The illustrated regulator comprises avoltage dropping impedance element, such as a resistor 43, connected inseries with a Zener diode Z1 between the diode D2 and the common bus N,with a smoothing capacitor 44 connected in parallel relation to theZener diode Z1. A reference or supply voltage bus P is connected to thejunction between the resistor 43 and the Zener diode Z1. The Zener diodehas a characteristic breakdown voltage of predetermined magnitude, e.g.,volts, and assuming that the peak magnitude of voltage energizing theregulator 24 is greater than this predetermined magnitude, the bus P ismaintained, with respect to the common bus N, at a substantiallyconstant positive vpotential equal to this breakdown voltage.

The bus V is connected to the diode D3 for energization, with respect tothe common bus N, by a positive unipolarity voltage the magnitude ofwhich corresponds to the highest instantaneous magnitude of the voltagesderived by the current sensors 40a, 4Gb, and 40C. Preferably a smoothingcapacitor 45 having a low capacitive value relative to the capacitor 44is connected between the 6 buses V and N. The potential of the bus V istherefore representative of the value of current in the protectedcircuit 11, and it comprises the D.C. input signal for the time delaycircuit 16, 17 Vand for the pulse generator 20a, as well as for the lowand high set level detectors 23 and 28 of the illustrated protectivedevice.

FIG. 2 shows a variable resistor R1 (the adjustable resistance element16 of FIG. 1), a diode D1, and a normally discharged timing capacitor C1(the long time energy storage element 17 of FIG. l) connected in seriesbetween the variable voltage bus V and the common bus N. The diode D1 ispoled to conduct charging current for the capacitor C1. An NPNtransistor Q1, comprising the supervising means 19 of FIG. 1, isconnected in parallel circuit relationship with the series combinationof diode D1 and capacitor C1, and while this transistor 1s on the diodeD1 will not conduct capacitor charging current.

The transistor Q1 has an emitter, .a collector, and a base electrodeconnected, respectively to the common bus N, to the anode of the diodeD1, and to the supply voltage bus P. As is shown in FIG. 2, thecollector of Q1 is connected to the anode of D1 by way of a resistor 46of relatively low resistance and an isolating diode 47, and a resistor48 is connected between the junction of these elements and the bus P.The base electrode of Q1 is connected to P by way of a current limitingresistor 49, and a clamping diode 50 interconnecting the base of Q1 andthe bus N is poled to prevent the potential at this electrode from goingappreciably more negative than N. As so connected the transistor Q1 isnormally biased on, that is, it is normally forward biased to aconductive state. Consequently it normally forms a low-impedance shuntpath clamping the anode of the diode D1 to the common bus N, and thevoltage on bus V cannot the effect charging of the timing capacitor C1.

The base electrode of the transistor Q1 is capacitively coupled to theperiodically operative control means 20a, 20b. Q1 is recurrentlyswitched oft by a negative pulse produced upon operation of this controlmeans. The control means includes the frequency-modulated pulsegenerator 20a and the slave pulsing circuit 20b.' Preferably the pulsegenerator Zita comprises a unijunction transistor Q2 having a capacitor51 connected across its emitter-base-one junction, with the interbasecircuit of Q2 being connected between the two buses P and N and with theemitter of Q2 being connected to a resistor 52 for energization inaccordance with the voltage on the variable voltage bus V. As is shownin FIG. 2, base-one and base-two of Q2 are connected to N and P by wayof resistors 53 and 54, respectively, and a resistor 55 is connectedbetween the supply voltage bus P and the emitter of Q2. As so arranged,and with `an appropriate selection of parameters, the unijunctiontransistor Q2 operates in a relaxation oscillator mode at a frequencythat varies linearly with variations in the magnitude of the variablevoltage energizing the bus V. It can be designed to operate, forexample, over a range of 70-1,000 cycles per second. Afrequency-modulated oscillator of this kind is the subject matter ofPatent 2,826,696, Suran, granted on Mar. ll, 1958, and assigned to theassignee of the present application.

Each oscillation of the unijunction transistor pulse generator 20aduring an overcurrent condition in the protected circuit 11 causes anegative-going pulse of brief duration to be transmitted to the baseelectrode of the transistor Q1, whereupon Q1 becomes reversely biasedand momentarily changes to a high-impedance inactive state enabling the`diode D1 to conduct. Thus an increment of charge is added to the timingcapacitor C1. The repetition rate of successive charging increments isdirectly proportional to the operating frequency of the oscillator 20awhich in turn depends on the magnitude of the variable input voltage,and initially the amount of each increment is also proportional to themagnitude of this voltage. It is apparent therefore that the averagecharging current seen by the capacitor C1 will be a function ofapproximately the second power of the variable input voltage.

By incrementally chargin-g the timing capacitor C1 in this fashion, itsvoltage is increased in a succession of small, discrete steps. Betweenthe intermittent periods during which capacitor charging is effected,the diode D1 is reversely biased and will prevent discharge of C1through the transistor Q1 which is then in its normal conductive state.The voltage across the capacitor C1 therefore rises inexorably, andelectric energy will accumulate in C1 until the energy stored thereinattains a predetermined critical level at which the capacitor voltage issucient to fire the level detector 21 that is connected thereto.

In FIG. 2 the level detector 21 is shown as a unijunction transistor Q3.Base-one of the unijunction transistor Q3 is connected to the common busN by way of a resistor 56, base-two is connected to the supply volta-gebus P by way of a resistor 57, and the emitter of Q3 is connected to therelatively positive terminal of the timing capacitor C1 by way of theisolating diode D5. A resistor 58 of very high resistance is connectedbetween the bus P and the emitter of Q3 as shown. Whenever the voltageacross capacitor C1 increases to a predetermined critical magnitude,corresponding to the peak point emitter voltage of the uni-junctiontransistor Q3 (eg. 9.5 volts), Q3 is activated or tired, therebyabruptly changing its emitter-base-one impedance from a very high to arelatively loW value. This operation is used to initiate opening of theswitch 13, thereby disconnecting the protected circuit 11 from its powersource 12. At the same time the capacitor C1 is quickly dischargedth-rou-gh a path including the then low-impedance emitter-base-onejunction of the unijunction transistor Q3.

The time t required to activate the uni-junction transistor leveldetector 21 of the protective device, following the occurrence of anovercurrent condition in the protected circuit, depends on the magnitudeof the variable voltage on bus V and on the effective time constant ofthe time delay circuit R1, C1. The variable voltage magnitude isdetermined by the amount of current I in the circuit, and the higher thecurrent the faster the timing capacitor C1 charges to its criticalvoltage level. The effective time constant of the time delay circuit isproportional to RC/X where R is the value of resistance introduced inthe circuit by element R1, C is the capacitive value of the capacitorC1, and X is a ratio of the on time to the on-and-of time for eifectingcapacitor charging. X can also be expressed as the product of thevariable operating frequency (in cycles per second) of the pulsegenerator 20a and the fixed duration (in seconds) of each control signalpulse in response to which the supervising means 19 permitscharging-current conduction by the intermittently conductive diode D1.Since the frequency of the pulse generator 20a is dependent upon themagnitude of the variable voltage at V and is thus determined by theovercurrent I, it is apparent that the effective time constant of thistime delay circuit decreases with increasing amounts of overcurrent inthe protected circuit. The shorter the effective time constant thefaster the capacitor C1 char-ges to its critical voltage level.Consequently, the operating characteristic of the protective deviceapproaches the desired I2t=K.

Parameters of the above-described circuitry are chosen to give whateveramount of time delay is desired at a predetermined reference amount Iofovercurrent (for example, a delay of about 15 seconds at an overcurrentmagnitude of six per unit). This is accomplished by appropriatelyselecting the capacitance of element C1, the resistance used at R1, andthe pulse-duration and reference frequency of the control signal pulsessupplied to the supervising means 19` by the control means 20a, 20b. Ifthe selected values of the individual components of the device havetheir usual tolerances, the timing actually obtained may not preciselycorrespond to that desired without Calibrating the device by nelyadjusting the duration of each control signal pulse, for which purposethe slave pulsing circuit 2011 is provided.

As can be seen in FIG. 2, the slave pulsing circuit 20b comprises acapacitor 60 of relatively small capacitive value connected between thecommon bus N and the cathode of a diode 61 whose anode is connected tobaseone of the unijunction transistor Q2 comprising thefrequency-modulated pulse generator 20a. Thus the capacitor 60 ischarged by the pulse train that Q2 generates when operating in itsrelaxation oscillator mode. The relatively positive terminal of thecapacitor 60 is connectedxby way of a resistor 62 t-o the base electrodeof an NPN transistor Q4 whose emitter is connected directly to thecommon bus N and whose collector is connected through a resistor 64 tothe supply voltage bus P. A base resistor 63 is connected across theemitter-base junction of Q4, and this transistor will be in anon-conductive or inactive state except when the capacitor 60 is in itscharged condition. The collector of Q4 is capacitively coupled, by meansof a capacitor 65 in series with a resistor 66, to the base of thetransistor Q1 comprising the supervising means 1-9. Each time thetransistor Q4 is activated the potential at its collector changesnegatively, thereby producing at the base of Q1 the control signal pulsethat turns off Q1. So long as this pulse subsists the transistor Q1 isbiased oif and the diode D1 is able to conduct charging current for thetiming capacitor C1.

The duration or width of each control signal pulse produced by thetransistor Q4, and hence the Aduration of each charging increment towhich the timing capacitor C1 is subjected, depends on the length oftime that the capacit-or 60 remains charged each time the uni-junctiontransistor Q2 is fired. Discharge of the capacitor 60 following eachtiring of Q2 is controlled by the resistor 62 and also by a variableresistor 67 connected across the capacitor 60 as shown. The desiredpulse width is obtained by judiciously selecting the resistive value of62 and 67, and this width can be conveniently changed (over a range of15-100 microseconds, for example) by appropriately adjusting the amountof resistance at 67. With this arrangement a substantially constantpulse width is obtained, and the protective device will have unusuallygood temperature stability qualities.

In the illustrated embodiment of the present invention, theabove-described slave pulsing circuit 2Gb is also used to controlsampling means for effecting momentary increases in the sensitivity ofthe unijunction transistor level detector 21. This has been accomplishedby connecting a capacitor 68, in series with a resistor 69, between thecollector of the transistor Q4 and base-two of the unijunctiontransistor Q3. The unijunction transistor Q3 has a nominal peak pointemitter voltage of relatively high value (eg. l0 volts), but each timethe associated transistor Q4 is activated the interbase voltage of Q3,being capacitively coupled to Q4, will be suiciently depressed to reducethe peak point emitter voltage to the above-mentioned critical level(e.g., 9.5 volts) required to activate the level detector 21. Byperiodically increasing the sensitivity of the level detector in thismanner, a desirable reduction in the size of the timing capacitor C1 canbe realized without stalling the unijunction transistor 'Q3 duringlow-grade overcurrent conditions. IThe possibility of stalling and theoperation and the advantages of the periodically active sampling meansare further explained in the copending Mathews application S.N. 128,472referred to hereinbefore.

As is illustrated in FIG. 2, the protective function that is initiatedupon activation of the level detector -21 is performed by means of asolid state controlled switch SCSI. This device is a four layer (PNPN)device known in the art as a silicon controlled switch. Its anode isconnected by way of a resistor 70 to the supply voltage bus P, itscathode is connected to the common bus N, and 1ts cathode gate isconnected to the junction of two resistors,

71 and 72 which are connected in series between base-one of theunijunction transistor Q3 and the common bus N. Until tired by a forwardbias current in its cathode gate, SCSI blocks current flow in bothdirections and hence is in effect an open circuit. When fired, however,it 'will abruptly change to a low-forward-impedance state that enablesappreciable current to flow in its anode-cathode circuit. Once turnedon, the switch will remain conductive until its anode current is reducedbelow a pre` determined minimum value known as the holding current.

Upon activation of the unijunction transistor Q3, the cathode gate ofthe switch SCSI is supplied with bias current of appropriate magnitudeand duration to turn on this switch. Suitable means 73 connected in theanodecathode circuit of SCSI responds to the resulting conduction byactuating the switch 13 in the protected circuit 11. In FIG. 2 the means73 is shown in block form connected in parallel circuit relationshipwith the anode resistor 70, and it may comprise for example anelectroret sponsive element the energization of which actuates theopening mechanism of the switch 13. The switch 13 is also shown in blockform in FIG. 2, and it may comprise either an electromechanical circuitbreaker for interrupting current in the circuit \11 or a staticequivalent.

The protective device shown in FIG. 2 is also provided with starting andresetting means which will now be described. In order to maintain thetiming capacitor C1 normally discharged, the cathode of the isolatingdiode D is connected to the common bus N by way of a normally forwardbiased diode 75 and a resistor 76 comprising the supervising means 22 ofFIG. 1. So long as diode 75 is forward biased, the capacitor C1 cannotaccumulate an appreciable amount of charge and the level detectorl 21remains inactive. This condition will subsist until the diode 75 isreversely biased by operation of the low set level `detector 23.

Preferably the level detector 23 comprises another silicon controlledswitch SCS2. As can be seen in FIG. 2, the cathode of this switch isconnected to the anode of the diode 75, the anode gate of the switch isconnected directly to the supply voltage bus P, and the anode of theswitch is connected to the junction of a resistor 77 and a variableresistor 78 forming a voltage divider across the variable voltage bus Vand the common bus N. Whenever the anode voltage of SCS2 is less than acritical breakdown magnitude that is determined by the magnitude of thesupply voltage applied to its anode gate, this switch is in aninoperative or inactive state (turned off). But when the anode voltagerises to the predetermined breakdown magnitude, SCS2 abruptly changes toan ac-` tive state (turns on or picks up), whereupon the anode-potential of the diode 75 is elevated to approximately that of thesupply voltage bus P. This action reversely biases the diode 75 andconsequently enables charging.

of the timing capacitor C1 to take place.

The selection of the resistive value of the resistor 78, relative tothat of resistor 77, determines the pickup level that must be reached bythe variable voltage on bus V to raise the anode voltage of SCS2 to itscritical breakdown magnitude, The parameters might be chosen, forexample, so that the level detector 23 operates in response to thevariable voltage attaining a level of 28 volts, corresponding to a oneper unit pickup value of current in 'the protected circuit 11. If theovercurrent condition in the protected circuit should subside before theprotective device has time to operate, the level detector 23 willimmediately revert to its normal inoperative state thereby removing thereverse bias of diode 75, whereupon any charge that may have beenaccumulated by the timing capacitor C1 is quickly dissipated through thediode 75 l@ and the resistor 76, and the protective device issubstantially instantaneously reset.

The above-described operation of the low set level detector 23 is alsoused to control conduction by a diode '79. The anode of the diode 79 isconnected to the relatively positive terminal of capacitor 51 formingpart of the frequency-modulated pulse generator 20a, and the cathode ofdiode 79 is connected by way of the resistor '76 to the common bus N,whereby the diode 79 is normally forward biased in which state itprevents appreciable charging of the capacitor 51 and thereforesuppresses operation of the pulse generator. Activation of the switchSCS2 in response to the variable voltage at V attaining thepredetermined pickup level will cause reverse bias of the diode 79 inthe manner that was previously described in connection with the diode75, and consequently capacitor 51 will no longerlbe clamped to thecommon bus N and the control means 20a, 2Gb can start producting itspulsating control signal for the supervising means 19.

In the interest of reliable operation by the various components of theprotective device that derive supply voltage from the bus P, namelycomponents 20a, 20b, 21, and 23, it is important that the supply orreference voltage on this bus have the same predetermined magnitudeunder all operating conditions. The supply voltage magnitude isdetermined by the regulator 24, and if the only source of energizationfor the regulator were the unipolarity voltage that is derived from theline current by the current sensing and translating means 15, acontinuous supply of the requisite voltage at the bus P might notbeassured under low-grade overcurrent conditions. Reliability is improvedby providing an alternative source of energization of dependably highmagnitude during such conditions.

Toward this end, the Zener diode Z1 of the regulator 24 is connected byway of a small resistor 80 and switch means 81 to the potential sensorand rectifier 25 which in FIG. 2 is seen to comprise a pair of potentialtransformers 82a and 82]) and four diodes 83. The primary windings ofthe transformers 82a and 82h are connected in open-delta configurationto the 3-wire circuit that connects the polyphase electric power source12 to the switch 13, and the voltage across the secondary winding ofeach transformer is therefore proportional to line-to-line A.C. voltageacross the wires to which the associated primary winding is connected.Each secondary winding is center tapped, and its opposite ends arerespectively connected to two of the diodes 83 to form a fullwaverectifier with the center tap comprising the negative D.C. outputterminal thereof. The negative D.C. terminals of these full-waverectiers are connected to the common bus N, while the positive D.C.terminals of the rectiers are both connected to the switch means 81 andhence to the regulator 24. The switch means 81 is arranged to be in alow impedance state (as shown) when the switch 13 is closed and to be ina high impedance state when the switch 13 is open.

When the protected circuit 11 is sound or is subject to only a smallamount of overcurrent (e.g., a value of just one per unit), the rectiedvoltage applied to the regulator 24 by the alternative source 25 has anamply high magnitude to ensure that the supply voltage on bus P iscontinuously maintained at the substantially constant magnitudedetermined by Z1. On the other hand, if the amount of overcurrent in theprotected circuit is large the output voltage of 25 may fall to arelatively low magnitude, but then the voltage applied to the regular 24by the source 15 will have an amply high magnitude to ensure therequisite supply voltage. The variable voltage bus V is isolated fromthe potential source 25 by the diode D2 as shown.

In the interest of security, it is important whenever the protectivedevice is initially energized that the supply or reference voltage atthe bus P rise to its assigned magnitude nearly as fast as voltageincreases on the variable voltage bus V. If the smoothing capacitor 44were connected directly across the Zener diode Z1, the rise of supplyvoltage in the above circumstance might be undesirably delayed. But thesmoothing capacitor 44 is not so connected. As can be seen in FIG. 2,its relatively positive terminal is connected by way of a resistor 84 tothe cathode of the diode D2, and another diode 85 has been providedbetween the same terminal and the supply voltage bus P. The diode 85 ispoled to enable the capacitor 44 to discharge into the bus P and therebyperform its smoothing function without impeding the initial rise ofsupply voltage to the regulated magnitude determined by Z1. This isanother feature of the abovementioned copending Steen application.

For relatively severe overcurrent or fault conditions, the illustratedprotective device has a short time operating characteristic that isobtained by means of an additional channel of operation comprising ahigh set level detector 28 and time delay means 29, 30. As it is shownin FIG. 2, the high set level detector preferably comprises anothersilicon controlled switch SCS3. The cathode of this switch is connectedby way of a resistor 86 to the cornrnon bus N, the anode gate of theswitch is connected directly to the supply voltage bus P, and the anodeof the switch is connected to the junction of a resistor 87 and avariable resistor 88 forming a voltage divider across the variablevoltage bus V and the common bus N. The relevant parameters might bechosen, for example, so that SCS3 is activated (picks up) when themagnitude of the variable voltage on the bus V rises to a predeterminedrelatively high pickup level corresponding to a nine per unit value ofovercurrent in the protected circuit 11.

A series RC circuit comprising a variable resistor R2 (the adjustableresistance element 29 of FIG. 1) and a normally discharged capacitor C2(the short time energy accumulating reactance element 30 of FIG. l) isconnected between the cathode of the switch SCS3 and the common bus N.Upon activation of SCS3, this RC circuit will be energized by a voltageapproximately equal in magnitude to the supply voltage on bus P. Therelatively positive terminal of capacitor C2 is connected via theisolating diode D4 to the emitter of the unijunction transistor Q3comprising the level detector 21 that has been described hereinbefore.The level detector 21 is activated in response to the capacitor C2 beingenergized enough to increase its charge to a predetermined criticallevel at which the voltage across this capacitor attains the magnituderequired to tire Q3, whereupon the desired operation of the siliconcontrolled switch SCSI and the electroresponsive element 73 is initiatedin the manner previously explained.

The time required to activate the unijuncton transistor level detector21 of the protective device, following the occurrence of a highovercurrent condition of sufficient severity to cause operation of thelevel detector 28, is determined by the time constant of the time delaycircuit R2, C2. The resistive value of R2 and the capacitive value of C2are chosen to give however short a time delay is desired under suchconditions. Substantially instantaneous operation can be obtained byusing an appropriately low resistance at R2.

While I have shown and described a preferred form of my invention by wayof illustration, many modifications may occur to those skilled in theart. It is contemplated, therefore, by the claims that conclude thisspecification to cover all such modifications as fall within the truespirit and scope of the invention.

What I claim as new and desire to secure by letters patent of the UnitedStates is:

1. A protective device comprising:

(a) means adapted to be coupled to an electric current circuit forderiving thrfrom a signal representative of circuit current;

(b) electric energy storing means;

(c) -means responsive to said signal for supplying to said energystoring means a succession of fixed duration energizing pulses theamplitude and frequency of which are both modulated by the signal; and

(d) means connected to said energy storing means for initiating apredetermined protective function when the energy accumulated in saidenergy storing means attains a predetermined critical level.

2. Means for initiating a predetermined control function in delayedresponse to the occurrence of an abnormal condition in an electriccurrent circuit, comprising:

(a) means adapted to be coupled to the circuit for deriving therefrom aD.C. signal having a magnitude dependent upon the value of acharacteristic electric quantity of the circuit;

(h) time delay means including a capacitor;

(c) means responsive to said signal -for incrementally charging saidcapacitor, the repetition rate of the charging increments beingproportional to the signal magnitude, the duration of each of saidincrements being relatively constant, and the magnitude of eachincrement being a function of the signal magnitude; and

(d) means connected to said capacitor for initiating a predeterminedcontrol function in response to the capacitor being charged apredetermined amount.

3. Protective means having an inverse-timeover-current operatingcharacteristic comprising:

(a) means adapted to be coupled to an alternating current circuit fordeveloping a pulsating DfC. energizing signal whose frequency andmagnitude both vary with the value of said alternating current;

(b) means for transmitting said signal to an electric energyaccumulating reactance element; and

(c) level detecting means connected to said element for producing anoutput signal in response to energization of the element by saidenergizing signal for a sufcient length of time to increase the energyaccumulated therein to a predetemined critical level.

4. Overcurrent protective means comprising:

(a) means adapted t-o be coupled to an electric current circuit forderiving therefrom a signal representative of circuit current;

(b) periodically operative control means connected to said signalderiving means and arranged to operate with a frequency that dependsupon the magnitude of said signal;

(c) electric energy storing means;

(d) means for effecting energization of said energy storing means inaccordance with the magnitude of said signal during intermittent periodsof relatively brief duration, said periods occurring at a ratedetermined by the operating frequency of said control means; and Y (e)means connected to said energy storing means for producing an outputsignal when the energy accumulated in said energy storing means attainsa predetermined critical level.

5. A protective device comprising:

(a) means adapted to be coupled to an electric current circuit forderiving a unipolarity voltage having a magnitude dependent upon thevalue of a characteristic electricvquantity of the circuit',

(b) a timing capacitor connected to said first-mentioned means forenergization by said voltage when the voltage magnitude exceeds apredetermined pickup level; v

(c) means recurrently preventing said energization of said capacitorduring intervals whose frequency and duration respectively increases anddecreases with increasing voltage magnitude; and

(d) means connected to said capacitor for initiating a predeterminedcontrol function in response to the capacitor being energized enough toincrease its charge to a predetermined critical level.

6. Protective means having an inverse-time-overcurrent operatingcharacteristic comprising:

(a) means adapted to be coupled to a source of alternating current forderiving therefrom a D.C. input signal having a magnitude that varieswith the value of alternating current;

(h) a time delay circuit, including an energy accumulating reactanceelement, connected to the input signal deriving means for energizationby said input signal;

(c) supervising means associated With said time delay circuit, saidsupervising means normally being in a state to prevent said element fromreceiving energy from said input signal;

(d) pulse generating means connected to said input signal deriving meansfor providing a pulsating control signal having a frequency that varieswith the magnitude of said input signal;

(e) said control signal being transmitted to said supervising meanswhich responds thereto by changing its state to one enabling saidelement to accumulate energy from said input signal; and

(f) a level detector connected to said element and arranged to operatein response to the accumulation by the element of a predeterminedcritical level of energy.

7. A protective device comprising:

(a) means adapted to be coupled to an electric current circuit forderiving therefrom a representative D.C. signal;

( b) a time delay circuit comprising a resistance element,

a diode, and a normally discharged capacitor connected in series to therst-mentioned means for energization by said signal;

(c) supervising means connected in parallel circuit relationship withthe series combination of said diode and said capacitor, saidsupervising means normally being in a low-impedance conductive state toprevent appreciable charging of said capacitor by said signal;

(d) periodically operative means connected to said firstmentioned meansand to said supervising means and arranged to operate with a frequencydependent upon the magnitude of said signal;

(e) said supervising means being momentarily changed to a high-impedancestate, thereby permitting said signal to incrementally charge saidcapacitor, in response to each operation of said periodically operativemeans; and

(f) means connected to said capacitor for initiating a predeterminedcontrol function in response to the capacitor charge being increased toa predetermined critical level.

8. The protective device of claim 7 in which the supervising meanscomprises a transistor.

9. In combination:

(a) a source of unipolarity voltage of variable magnitude;

(b) a timing capacitor;

(c) a charging circuit for said capacitor, the circuit being connecteddirectly to said source for energization by said voltage;

(d) means shunting said charging circuit for normally preventingcharging of said capacitor;

(e) means for so controlling said shunting means as to permitintermittent charging of the capacitor at a rate proportional to themagnitude of said voltage; and

(f) means connected to said capacitor for performing a predeterminedcontrol function in response to voltage across the capacitor attaining apredetermined critical magnitude.

10. A circuit interrupter comprising:

(a) means adapted to be connected in an electric current circuit forinterrupting current in said circuit when actuated;

(b) electric energy storing means;

(c) means responsive to the circuit current for supplying to said energystoring means a succession of fixedduration energizing pulses theamplitude and frequency `of which both vary With the value of saidcurrent; and

(d) means connected to said energy storing means for actuating thefirst-mentioned means when the energy accumulated in said energy storingmeans attains a predetermined critical level.

References Cited bythe Examiner UNITED STATES PATENTS 3,018,416 1/1962Karlicek et al. 317-36 3,176,190 3/1965 Hodges 317-28 3,179,850 4/1965Mathews 317-36 References Cited by the Applicant UNITED STATES PATENTS2,468,418 4/1949 Thumim.

MILTON O. HIRSHFIELD, Primary Examiner.

I. D. TRAMMELL, Assistant Examiner.

1. A PROTECTIVE DEVICE COMPRISING: (A) MEANS ADAPTED TO BE COUPLED TO ANELECTRIC CURRENT CIRCUIT FOR DERIVING THEREFROM A SIGNAL REPRESENTATIVEOF CIRCUIT CURRENT; (B) ELECTRIC ENERGY STORING MEANS; (C) MEANSRESPONSIVE TO SAID SIGNAL FOR SUPPLYING TO SAID ENERGY STORING MEANS ASUCCESSION OF FIXED DURATION ENERGIZING PULSES THE AMPLITUDE ANDFREQUENCY OF WHICH ARE BOTH MODULATED BY THE SIGNAL; AND (D) MEANSCONNECTED TO SAID ENERGY STORING MEANS FOR INITIATING A PREDETERMINEDPROTECTIVE FUNCTION WHEN THE ENERGY ACCUMULATED IN SAID ENERGY STORINGMEANS ATTAINS A PREDETERMINED CRITICAL LEVEL.